Write Buffer:



Information:
The tri-state buffer isolates the input of the data/tag cell to the rest of the cell when the input is not need.

Specs:
Speed: .75 - 1 ns
Size: 187 x 60 lamba (buffer)
Size: 120 x 60 lamba (precharge)

(buffer)
# transistors: 320
# drawn trans: 20
replication factor: 16x
active area vs. routing area: 2520 / 8700 = 28.97%
total area/block: 11220 lambda sq.
area vs # trans: 35.06 lambda sq / tran.
power consumption: 24.3 E -12 W
design time: 40 hrs. (Time spent testing.)

(precharge) # transistors: 96
# drawn trans: 6
replication factor: 16x
active area vs. routing area: 1296 / 5424 = 23.89%
total area/block: 6720 lambda sq.
area vs # trans: 70 lambda sq / tran.
power consumption: n/a
design time: 10 hrs.

Modification:

Size of cell reduced from 187 x 130 lamba.

Original "dual sense-amp" design abandoned. A single sense amps will used for both pairs of bitlines instead.

Invertor is now associated with the non-interted bitline. (Done since the output is inverted.)

Downloads:
Write Buffer Layout
Precharge Layout