TeamX Logo
We Make CAM design hip.

Welcome to the website for Group #11 (AKA TeamX) of ECE 569/669: VLSI Design Project at the University Of Massachusetts.

The Team:
André Mathieu Manager
Brian Interfacer
Andrew Wolan Archiver
Prof. Wayne Burleson burleson@galois.ecs.umass.eduSupervisor

Current Project:
Dual Ported Priority-Based Content Addressable Memory

The CAM that we are designing has no specific audience in mind. However, a great application would be for use in network routers. All routers have what is called a routing table. This table tells the router where to forward a packet given an IP address. CAMs are used extensively for this purpose. Our design can be used to extend on this usage by assigning multiple possible destinations (links) for a given IP based on a priority level (location) in the CAM. If a link goes down, that entry just needs to be invalidated and the next preferred link will be returned. Also, the dual-port nature of the CAM allows for multiple reads from the CAM at a time.

To learn more about of our project, refer to the links on the left hand side of the page.

Copyright(c) 2000 André Mathieu, Brian Magnuson, Andrew Wolan